RESEARCH OF METHODS OF INCREASING THE PERFORMANCE OF THE MEMORY SUBSYSTEM IN ELECTRONIC COMPUTING MACHINES

DOI: 10.31673/2786-8362.2024.023081

Abstract

This article explores methods of optimizing the
interaction between the processor and the random access memory (RAM) to improve the performance of
computer systems. The main parameters of DDR4 memory timings according to the JEDEC specification
are studied, as well as the influence of these parameters on system speed. The interdependence of internal
parameters of memory delays and their influence on each other are investigated. Recommendations for
setting primary and secondary RAM timings are presented, as well as features of multi-channel
configurations that allow achieving optimal memory performance for scientific computing, machine
learning, and other resource-intensive tasks. The main optimization methods, key features and impact on
performance are considered. The main programs for testing the stability of the system when performing
performance optimization actions are specified, a theoretical presentation of key information for further indepth research of the topic is made, and the implementation of optimization methods for improving
performance when working on a computer and performing tasks that require high performance of the
system. Systematization of information about the latency at the hardware level, in the central processor and
the interaction of the built-in memory controller with the RAM.

Keywords: RAM, JEDEC, DRAM, DDR, memory latency, CPU cache, timing optimization, methods
of memory optimization, memory management

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